Experience : 1 Year
Education : B.E, M.Tech
Role :
Should have Experience in Verilog, SystemVerilog, UVM
Design and Develop Testplan
Develop Testcase in UVM/SV,C
Willing to work as individual to develop Drive/Monitor code
Job Description :
Should have knowledge on APB/AXI/AHB protocol.
MIPI protocol is added advantages
Knowledge in Perl, Python
Salary : 3 LPA
Monthly based
Worldwide
