PREFERRED EXPERIENCE: Minimum 7+ years' experience in ASIC
Design Verification, with knowledge of Computer Architecture, Cache levels Solid background and understanding of Digital Design, RTL design, and strong troubleshooting, analytical and debugging skills. Must have excellent knowledge of design & verification flows and system knowledge. Excellent hands-on debug skills, and excellent problem-solving skills Post-Si debugging is preferred. Any Verification methodology involving OOPs concepts C++, OVM/UVM methodology knowledge and experience is a plus. Prior experience in functional verification of Processor subsystems such as x86 or ARM domain-based Cores Excellent script writing (Perl)
Experience: 7 to 15 years
Annual 1400000 to 2000000
Location: Bengaluru / Bangalore
Monthly based
Karnataka , India
